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Complexitylib.Models.RandomAccessMachine.Structured.Hamming.Defs

Structured RAM Hamming-weight program — definitions #

The benchmark uses a small reserved-register ABI: registers R₀ through R₄ hold loop state and input bits start at R₅. This avoids the existing raw RAM input convention's overlap between an unbounded input and fixed scratch registers.

Remaining input length and final-result register.

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    Hamming-weight accumulator register.

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      Constant-one register used for increments and decrements.

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        Temporary register receiving the current input bit.

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          First register occupied by input data under the reserved-register ABI.

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            Natural-number representation of one input bit.

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              Basic instructions that initialize the accumulator, input pointer, and constant-one register.

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                One Hamming-weight loop iteration.

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                  Copy the accumulator to the result register R₀.

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                    Exact number of target RAM transitions needed to reach the compiled halt instruction. A zero bit uses six loop transitions and a one bit uses eight.

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                      Explicit logarithmic-cost time budget as a function of input length. The constant is deliberately simple: the important content is the linear number of operations, each on values of O(bitlen n) bits.

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                        Explicit peak-space budget for the reserved-register input representation. There are at most inputLength + 5 nonzero registers, and both an occupied register index and its value have at most bitlen (inputLength + 5) bits.

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                          A shifted n · bitlen n comparison function used to state the benchmark's quasilinear time and space bounds without hiding small-input behavior.

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