Structured logarithmic-cost RAM programs — definitions #
This file defines a minimal first-order imperative language over RAM register stores. Atomic commands are the data-manipulating RAM instructions; sequencing, conditionals, and loops are structured syntax rather than program-counter arithmetic. The source semantics is independent of compilation and records the same operand-sensitive logarithmic cost and finite-support space measure as the target RAM.
Cmd.compileAt erases structured control flow into absolute jz/jmp targets.
The compiler appends no hidden data operations: source and target executions
therefore have equal register effects, logarithmic cost, and peak register space.
A source store maps register indices to natural-number contents.
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Logarithmic space occupied by a source store. This deliberately matches
RAM.Cfg.space, but does not mention a target program counter.
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Data-manipulating instructions of the structured source language. Control
flow is represented by Cmd, so arbitrary jumps and halt are not source atoms.
- imm (dst value : ℕ) : Basic
- add (dst left right : ℕ) : Basic
- sub (dst left right : ℕ) : Basic
- mul (dst left right : ℕ) : Basic
- load (dst address : ℕ) : Basic
- store (address src : ℕ) : Basic
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- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.imm dst value) (Complexity.RAM.Structured.Basic.add dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.imm dst value) (Complexity.RAM.Structured.Basic.sub dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.imm dst value) (Complexity.RAM.Structured.Basic.mul dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.imm dst value) (Complexity.RAM.Structured.Basic.load dst_1 address) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.imm dst value) (Complexity.RAM.Structured.Basic.store address src) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.add dst left right) (Complexity.RAM.Structured.Basic.imm dst_1 value) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.add dst left right) (Complexity.RAM.Structured.Basic.sub dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.add dst left right) (Complexity.RAM.Structured.Basic.mul dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.add dst left right) (Complexity.RAM.Structured.Basic.load dst_1 address) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.add dst left right) (Complexity.RAM.Structured.Basic.store address src) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.sub dst left right) (Complexity.RAM.Structured.Basic.imm dst_1 value) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.sub dst left right) (Complexity.RAM.Structured.Basic.add dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.sub dst left right) (Complexity.RAM.Structured.Basic.mul dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.sub dst left right) (Complexity.RAM.Structured.Basic.load dst_1 address) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.sub dst left right) (Complexity.RAM.Structured.Basic.store address src) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.mul dst left right) (Complexity.RAM.Structured.Basic.imm dst_1 value) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.mul dst left right) (Complexity.RAM.Structured.Basic.add dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.mul dst left right) (Complexity.RAM.Structured.Basic.sub dst_1 left_1 right_1) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.mul dst left right) (Complexity.RAM.Structured.Basic.load dst_1 address) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.mul dst left right) (Complexity.RAM.Structured.Basic.store address src) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.load dst address) (Complexity.RAM.Structured.Basic.imm dst_1 value) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.load dst address) (Complexity.RAM.Structured.Basic.add dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.load dst address) (Complexity.RAM.Structured.Basic.sub dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.load dst address) (Complexity.RAM.Structured.Basic.mul dst_1 left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.load dst address) (Complexity.RAM.Structured.Basic.store address_1 src) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.store address src) (Complexity.RAM.Structured.Basic.imm dst value) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.store address src) (Complexity.RAM.Structured.Basic.add dst left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.store address src) (Complexity.RAM.Structured.Basic.sub dst left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.store address src) (Complexity.RAM.Structured.Basic.mul dst left right) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqBasic.decEq (Complexity.RAM.Structured.Basic.store address src) (Complexity.RAM.Structured.Basic.load dst address_1) = isFalse ⋯
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Execute one source-level basic instruction on a register store.
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- (Complexity.RAM.Structured.Basic.imm dst value).exec x✝ = Function.update x✝ dst value
- (Complexity.RAM.Structured.Basic.add dst left right).exec x✝ = Function.update x✝ dst (x✝ left + x✝ right)
- (Complexity.RAM.Structured.Basic.sub dst left right).exec x✝ = Function.update x✝ dst (x✝ left - x✝ right)
- (Complexity.RAM.Structured.Basic.mul dst left right).exec x✝ = Function.update x✝ dst (x✝ left * x✝ right)
- (Complexity.RAM.Structured.Basic.load dst address).exec x✝ = Function.update x✝ dst (x✝ (x✝ address))
- (Complexity.RAM.Structured.Basic.store address src).exec x✝ = Function.update x✝ (x✝ address) (x✝ src)
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Erase a source basic instruction to the corresponding RAM instruction.
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- (Complexity.RAM.Structured.Basic.imm dst value).instr = Complexity.RAM.Instr.imm dst value
- (Complexity.RAM.Structured.Basic.add dst left right).instr = Complexity.RAM.Instr.add dst left right
- (Complexity.RAM.Structured.Basic.sub dst left right).instr = Complexity.RAM.Instr.sub dst left right
- (Complexity.RAM.Structured.Basic.mul dst left right).instr = Complexity.RAM.Instr.mul dst left right
- (Complexity.RAM.Structured.Basic.load dst address).instr = Complexity.RAM.Instr.load dst address
- (Complexity.RAM.Structured.Basic.store address src).instr = Complexity.RAM.Instr.store address src
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Operand-sensitive source cost of one basic instruction.
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- (Complexity.RAM.Structured.Basic.imm dst value).logCost x✝ = Complexity.RAM.bitlen value + 1
- (Complexity.RAM.Structured.Basic.add dst left right).logCost x✝ = Complexity.RAM.bitlen (x✝ left) + Complexity.RAM.bitlen (x✝ right) + Complexity.RAM.bitlen (x✝ left + x✝ right) + 1
- (Complexity.RAM.Structured.Basic.sub dst left right).logCost x✝ = Complexity.RAM.bitlen (x✝ left) + Complexity.RAM.bitlen (x✝ right) + 1
- (Complexity.RAM.Structured.Basic.mul dst left right).logCost x✝ = Complexity.RAM.bitlen (x✝ left) + Complexity.RAM.bitlen (x✝ right) + Complexity.RAM.bitlen (x✝ left * x✝ right) + 1
- (Complexity.RAM.Structured.Basic.load dst address).logCost x✝ = Complexity.RAM.bitlen (x✝ address) + Complexity.RAM.bitlen (x✝ (x✝ address)) + 1
- (Complexity.RAM.Structured.Basic.store address src).logCost x✝ = Complexity.RAM.bitlen (x✝ address) + Complexity.RAM.bitlen (x✝ src) + 1
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Execute a straight-line list of basic instructions.
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- Complexity.RAM.Structured.Basic.execList [] x✝ = x✝
- Complexity.RAM.Structured.Basic.execList (op :: rest) x✝ = Complexity.RAM.Structured.Basic.execList rest (op.exec x✝)
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- Complexity.RAM.Structured.instDecidableEqCmd.decEq Complexity.RAM.Structured.Cmd.skip Complexity.RAM.Structured.Cmd.skip = isTrue ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq Complexity.RAM.Structured.Cmd.skip (Complexity.RAM.Structured.Cmd.basic op) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq Complexity.RAM.Structured.Cmd.skip (first.seq second) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq Complexity.RAM.Structured.Cmd.skip (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq Complexity.RAM.Structured.Cmd.skip (Complexity.RAM.Structured.Cmd.whileNonzero test body) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.basic op) Complexity.RAM.Structured.Cmd.skip = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.basic a) (Complexity.RAM.Structured.Cmd.basic b) = if h : a = b then h ▸ isTrue ⋯ else isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.basic op) (first.seq second) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.basic op) (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.basic op) (Complexity.RAM.Structured.Cmd.whileNonzero test body) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (first.seq second) Complexity.RAM.Structured.Cmd.skip = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (first.seq second) (Complexity.RAM.Structured.Cmd.basic op) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (first.seq second) (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (first.seq second) (Complexity.RAM.Structured.Cmd.whileNonzero test body) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) Complexity.RAM.Structured.Cmd.skip = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) (Complexity.RAM.Structured.Cmd.basic op) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) (first.seq second) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero) (Complexity.RAM.Structured.Cmd.whileNonzero test_1 body) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.whileNonzero test body) Complexity.RAM.Structured.Cmd.skip = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.whileNonzero test body) (Complexity.RAM.Structured.Cmd.basic op) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.whileNonzero test body) (first.seq second) = isFalse ⋯
- Complexity.RAM.Structured.instDecidableEqCmd.decEq (Complexity.RAM.Structured.Cmd.whileNonzero test body) (Complexity.RAM.Structured.Cmd.ifZero test_1 onZero onNonzero) = isFalse ⋯
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Number of RAM instructions emitted for a structured command.
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- Complexity.RAM.Structured.Cmd.skip.codeSize = 0
- (Complexity.RAM.Structured.Cmd.basic op).codeSize = 1
- (first.seq second).codeSize = first.codeSize + second.codeSize
- (Complexity.RAM.Structured.Cmd.ifZero test onZero onNonzero).codeSize = 2 + onZero.codeSize + onNonzero.codeSize
- (Complexity.RAM.Structured.Cmd.whileNonzero test body).codeSize = body.codeSize + 2
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Compile a command whose first instruction will be placed at start.
All generated branch destinations are absolute RAM program counters.
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- Complexity.RAM.Structured.Cmd.compileAt x✝ Complexity.RAM.Structured.Cmd.skip = []
- Complexity.RAM.Structured.Cmd.compileAt x✝ (Complexity.RAM.Structured.Cmd.basic op) = [op.instr]
- Complexity.RAM.Structured.Cmd.compileAt x✝ (first.seq second) = Complexity.RAM.Structured.Cmd.compileAt x✝ first ++ Complexity.RAM.Structured.Cmd.compileAt (x✝ + first.codeSize) second
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Compile a closed source command and halt immediately after it finishes.
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Right-associated sequential composition of a list of commands.
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- Complexity.RAM.Structured.Cmd.seqList [] = Complexity.RAM.Structured.Cmd.skip
- Complexity.RAM.Structured.Cmd.seqList [cmd] = cmd
- Complexity.RAM.Structured.Cmd.seqList (cmd :: next :: rest) = cmd.seq (Complexity.RAM.Structured.Cmd.seqList (next :: rest))
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Embed a straight-line list of basic instructions as one structured command.
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Independent big-step semantics for structured commands. Besides the final store, the relation records target instruction steps, exact logarithmic cost, and peak source-store space. Branch and loop-control costs are explicit.
- skip (store : Store) : Exec Cmd.skip store store 0 0 store.space
- basic (op : Basic) (store : Store) : Exec (Cmd.basic op) store (op.exec store) 1 (op.logCost store) (max store.space (op.exec store).space)
- seq {first second : Cmd} {store middle final : Store} {firstSteps secondSteps firstCost secondCost firstSpace secondSpace : ℕ} (hfirst : Exec first store middle firstSteps firstCost firstSpace) (hsecond : Exec second middle final secondSteps secondCost secondSpace) : Exec (first.seq second) store final (firstSteps + secondSteps) (firstCost + secondCost) (max firstSpace secondSpace)
- ifZero {test : ℕ} {onZero onNonzero : Cmd} {store final : Store} {steps cost space : ℕ} (htest : store test = 0) (hbranch : Exec onZero store final steps cost space) : Exec (Cmd.ifZero test onZero onNonzero) store final (steps + 1) (bitlen (store test) + 1 + cost) (max store.space space)
- ifNonzero {test : ℕ} {onZero onNonzero : Cmd} {store final : Store} {steps cost space : ℕ} (htest : store test ≠ 0) (hbranch : Exec onNonzero store final steps cost space) : Exec (Cmd.ifZero test onZero onNonzero) store final (steps + 2) (bitlen (store test) + 1 + cost + 1) (max store.space space)
- whileZero {test : ℕ} {body : Cmd} {store : Store} (htest : store test = 0) : Exec (Cmd.whileNonzero test body) store store 1 (bitlen (store test) + 1) store.space
- whileNonzero {test : ℕ} {body : Cmd} {store middle final : Store} {bodySteps loopSteps bodyCost loopCost bodySpace loopSpace : ℕ} (htest : store test ≠ 0) (hbody : Exec body store middle bodySteps bodyCost bodySpace) (hloop : Exec (Cmd.whileNonzero test body) middle final loopSteps loopCost loopSpace) : Exec (Cmd.whileNonzero test body) store final (bodySteps + loopSteps + 2) (bitlen (store test) + 1 + bodyCost + 1 + loopCost) (max bodySpace loopSpace)