Anti-checker generator output padding #
This module exposes the exact semantics and size of the circuit that prepends
zero sample rows to the selected inputs. The padded circuit therefore prints
the canonical AntiChecker.padInputsTo list at the published sample count.
Unpacking one row after packed zero padding gives the corresponding row of the appended zero-and-source tuple.
Unpacking every row after packed zero padding agrees exactly with the canonical list-level padding operation.
The zero-internal-gate padding circuit computes packed zero padding exactly.
Packed padding costs exactly one output gate per target output bit and no internal gates.
The padded selection circuit first computes the required-round samples and then prepends their packed zero rows.
Padding adds exactly the published output width to the unpadded selection circuit's size.
On a target truth table, the padded circuit prints the canonical padding of a full greedy estimate-selection trace.
For every sufficiently large positive arity, correctness of the finite counter family makes the padded circuit output an anti-checker for every hard target. This certifies the circuit's computed output, rather than merely the existence of a suitable list.