Documentation

Complexitylib.Interop.Cslib.Circuit.Internal

Proofs for the CSLib circuit bridge #

The gate simulating a line computes the line's operation.

Our wire values in the translation are the CSLib program's wire values.

The translation computes what the CSLib circuit computes.

theorem Complexity.Circuit.synthesis_gate {N W : ℕ} (gt : Gate Basis.andOr2 W) (val : BitString N → BitString W) (s : Set (BitString N → Bool)) (hs : ∀ (k : Fin gt.fanIn), (fun (x : BitString N) => gt.negated k ^^ val x (gt.inputs k)) ∈ s) :

A fan-in-two AND/OR gate whose two literals are available costs one CSLib gate.

def Complexity.Circuit.litSet {N M G : ℕ} [NeZero N] [NeZero M] (c : Circuit Basis.andOr2 N M G) (bound : ℕ) :

Literals b ⊕ w of the wires w below bound.

Equations
Instances For

    Spending one negation per input makes every input literal available.

    Two more gates make both literals of the next gate wire available.

    Every fan-in-two AND/OR circuit is a CSLib De Morgan circuit of size at most N + 2G + M computing the same outputs.