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Complexitylib.Cslib.Circuit.Fanout

Wire accounting and shared gates #

For a circuit with no unused gates, let w count original input occurrences and let e sum each gate's uses beyond its first. Double counting gives w + e + size = totalFanIn + outputCount. Thus a binary single-output circuit satisfies w + e = size + 1. Every shared gate contributes at least one to e, so w + sharedGates.card ≤ size + 1 as well.

Uses include designated outputs and count repeated gate arguments separately. No assumption of distinct arguments, Boolean values, positive input count, or gated outputs is needed. The no-unused-gates hypothesis is essential to the balance equation: an unused gate has no first use to subtract.

These generic extensions of CSLib's circuit model are candidates for upstreaming. They count structural sharing, without assigning a semantic or communication cost to a shared gate.

Exact wire-use accounting for a circuit without unused gates.

Each shared gate contributes at least one use beyond its first.

theorem Cslib.Circuits.Circuit.inputUses_add_excessFanout_eq {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (used : c.NoUnusedGates) (binary : ∀ (j : Fin c.size), σ.Arity (c.program.lines j).op = 2) :

Exact binary fan-in turns wire accounting into w + e = size + outputCount.

Fan-in at most two bounds input occurrences plus excess gate uses.

In fan-in-two circuits, shared gates consume the same budget as input occurrences.