Documentation

Complexitylib.Cslib.Circuit.Program

Building, measuring, and bounding CSLib programs #

This file extends CSLib's straight-line programs (Cslib.Circuits.Program):

This file lives in Complexitylib/Cslib/ because it extends CSLib types in their home namespace Cslib.Circuits; its contents are candidates for upstreaming to CSLib.

Main definitions #

Main results #

theorem Cslib.Circuits.Wire.elim_eq_addCases_index {N g : ℕ} {α : Sort u_1} (x : Fin N → α) (v : Fin g → α) (w : Wire N g) :
elim x v w = Fin.addCases x v w.index

A valuation of wires is the valuation of their indices that lists the inputs and then the gates.

theorem Cslib.Circuits.Program.wireDepths_gate_castSucc {σ : Signature} {N g : ℕ} (p : Program σ N g) (line : Line σ N g) (w : Wire N g) :

Widening a wire into a longer program keeps its CSLib depth.

theorem Cslib.Circuits.Program.depths_eq_lines_depth {σ : Signature} {N g : ℕ} (p : Program σ N g) (j : Fin g) :

Line j of a program has the CSLib depth of gate j.

def Cslib.Circuits.Program.ofLines {σ : Signature} {N : ℕ} (g : ℕ) :
((j : Fin g) → Line σ N ↑j) → Program σ N g

The program whose line j is F j, a line reading only the inputs and the j gates before it.

Equations
Instances For
    def Cslib.Circuits.Program.wireCastLE {N j g : ℕ} (h : j ≤ g) :
    Wire N j → Wire N g

    Regard a wire of a program with j gates as a wire of a program with g ≥ j gates, extending the first.

    Equations
    Instances For
      @[simp]
      theorem Cslib.Circuits.Program.index_wireCastLE {N j g : ℕ} (h : j ≤ g) (w : Wire N j) :

      Widening a wire keeps its index.

      theorem Cslib.Circuits.Program.lines_ofLines {σ : Signature} {N : ℕ} (g : ℕ) (F : (j : Fin g) → Line σ N ↑j) (j : Fin g) :
      (ofLines g F).lines j = (F j).mapWires (wireCastLE ⋯)

      The lines of Program.ofLines are the given lines, widened.

      theorem Cslib.Circuits.Line.depth_mono {σ : Signature} {N g : ℕ} (l : Line σ N g) {d e : Wire N g → ℕ} (h : ∀ (a : Fin (σ.Arity l.op)), d (l.wires a) ≤ e (l.wires a)) :
      l.depth d ≤ l.depth e

      A line's depth is monotone in the depths of the wires it reads.

      theorem Cslib.Circuits.Program.wireDepths_le {σ : Signature} {N g : ℕ} (p : Program σ N g) (b : Wire N g → ℕ) (hb : ∀ (j : Fin g), (p.lines j).depth b ≤ b (Wire.gate j)) (w : Wire N g) :
      p.wireDepths w ≤ b w

      Bounding CSLib depth by a line-wise certificate. If b bounds every line's depth at the line's own wire, it bounds every wire's depth.

      def Cslib.Circuits.Program.totalFanIn {σ : Signature} {N g : ℕ} (p : Program σ N g) :

      The total fan-in of a program: the number of wires read by all its gates, counted with multiplicity. It is the program's cost when every operation costs its arity.

      Equations
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        The total fan-in is the cost charging each operation its arity.

        @[simp]

        The empty program reads no wires.

        @[simp]
        theorem Cslib.Circuits.Program.totalFanIn_gate {σ : Signature} {N g : ℕ} (p : Program σ N g) (line : Line σ N g) :
        (p.gate line).totalFanIn = p.totalFanIn + σ.Arity line.op

        A new gate adds its arity to the total fan-in.

        theorem Cslib.Circuits.Program.totalFanIn_eq_sum_lines {σ : Signature} {N g : ℕ} (p : Program σ N g) :
        p.totalFanIn = ∑ j : Fin g, σ.Arity (p.lines j).op

        The total fan-in is the sum of the arities of the program's lines.

        def Cslib.Circuits.Circuit.totalFanIn {σ : Signature} {N m : ℕ} (c : Circuit σ N m) :

        The total fan-in of a circuit: the number of wires read by all its gates, counted with multiplicity. Designated outputs read nothing.

        Equations
        Instances For

          The total fan-in of a circuit is the cost charging each operation its arity.

          @[simp]
          theorem Cslib.Circuits.Circuit.totalFanIn_mk {σ : Signature} {N m g : ℕ} (p : Program σ N g) (outputs : Fin m → Wire N g) :
          { size := g, program := p, outputs := outputs }.totalFanIn = p.totalFanIn

          A circuit's total fan-in is its program's.

          @[simp]
          theorem Cslib.Circuits.Circuit.totalFanIn_wiring {σ : Signature} {N m : ℕ} (select : Fin m → Fin N) :
          (wiring σ select).totalFanIn = 0

          A wiring has no gates, so it reads no wires.