Numeric finalization schedule for direct tableau serialization #
This module exposes a natural-number acceptance gate, exact padding and terminal-copy phase laws, and the complete literal decomposition of every normalized positive padded direct-unrolling circuit. Together with the numeric initialization schedule and canonical transition fragments, the decomposition specifies the raw gate stream without run-time configuration atoms or formulas.
Main results #
numericAcceptanceGate_eq_acceptanceGateidentifies the arithmetic gate.directUnrollingRawCircuit_length_eq_originalgives the exact unpadded count.paddedDirectUnrollingRawCircuit_eq_numericSchedulegives the complete raw list decomposition.
The numeric state/output-cell addresses literally produce the existing acceptance gate for the fixed deterministic machine.
The numeric padding phase contains exactly the closed-bound shortfall.
Every index in the numeric padding phase emits a dead constant-false gate.
Padding followed by the terminal copy has shortfall-plus-one gates.
Indices before the finalization boundary are exactly the padding phase.
The gate at the finalization boundary is the terminal original-output copy.
Every canonical deterministic transition fragment has the fixed numeric layer size.
A normalized positive padded direct tableau is literally numeric initialization, canonical transition fragments, numeric acceptance, dead padding, and one terminal copy of the original acceptance output.