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Complexitylib.Classes.PPoly.Defs

Nonuniform circuit classes — definitions #

This module defines language semantics for circuit families, pointwise circuit size classes, and PPoly, the class conventionally written P/poly.

PPoly is initially specialized to the library's fan-in-two AND/OR basis with free per-gate-input negation flags. Primary input vertices are also excluded from Circuit.size. These choices preserve the usual polynomial-size class after elementary overhead simulations, but exact SIZE bounds are convention-dependent. Basis/size invariance must be proved rather than treated as definitional.

The language whose characteristic function is f, using the canonical list-to-fixed-length representation.

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    The language recognized by a circuit family.

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      F decides L when its recognized language is exactly L.

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        Languages decided by B-circuit families with the pointwise size bound s, using this library's non-input-gate count.

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          The fan-in-two AND/OR circuit-size class under the library's free-negation, non-input-gate convention.

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            P/poly: languages decided by polynomial-size nonuniform fan-in-two AND/OR circuit families under the library's size convention, expressed through the SIZE class as the union of the pointwise size classes over all natural-coefficient polynomials. Equivalent to the pointwise PolynomialSize formulation; see PPoly_eq_iUnion_SIZE (definitional) and the big-O characterization mem_PPoly_iff.

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