Boolean Circuit Complexity #
This file defines Boolean circuits parameterized by a basis of operations and establishes the circuit size complexity measure for Boolean functions.
Main definitions #
BitString— a string of bits of a specific lengthBoolFunFamily— a family of Boolean functions indexed by input lengthBasis— a basis of Boolean operations with arity constraintsCircuit— an acyclic Boolean circuit (well-formedness by construction)CompleteBasis— typeclass for functionally complete basesCircuit.wireDepth— depth of a wire in the circuit DAGCircuit.outputDepth— depth of a single output gateCircuit.depth— depth of a (possibly multi-output) circuitCircuit.sizeComplexity— minimum circuit size computing a given function
Main results #
Circuit.sizeComplexity_pos— for complete bases, size complexity is positive
A BitString of length n.
Equations
- Complexity.BitString n = (Fin n → Bool)
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A family of Boolean functions indexed by input length N.
Each member maps N-bit strings to a single output bit.
Equations
- Complexity.BoolFunFamily = ((N : ℕ) → Complexity.BitString N → Bool)
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Equations
- One or more equations did not get rendered due to their size.
- Complexity.instReprArity.repr Complexity.Arity.unbounded prec✝ = Repr.addAppParen (Std.Format.nest (if prec✝ ≥ 1024 then 1 else 2) (Std.Format.text "Complexity.Arity.unbounded")).group prec✝
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Equations
- Complexity.instReprArity = { reprPrec := Complexity.instReprArity.repr }
Equations
- Complexity.instDecidableEqArity.decEq Complexity.Arity.unbounded Complexity.Arity.unbounded = isTrue ⋯
- Complexity.instDecidableEqArity.decEq Complexity.Arity.unbounded (Complexity.Arity.exactly k) = isFalse ⋯
- Complexity.instDecidableEqArity.decEq Complexity.Arity.unbounded (Complexity.Arity.upto k) = isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.exactly k) Complexity.Arity.unbounded = isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.exactly a) (Complexity.Arity.exactly b) = if h : a = b then h ▸ isTrue ⋯ else isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.exactly k) (Complexity.Arity.upto k_1) = isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.upto k) Complexity.Arity.unbounded = isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.upto k) (Complexity.Arity.exactly k_1) = isFalse ⋯
- Complexity.instDecidableEqArity.decEq (Complexity.Arity.upto a) (Complexity.Arity.upto b) = if h : a = b then h ▸ isTrue ⋯ else isFalse ⋯
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Whether n satisfies an arity constraint.
Equations
- Complexity.Arity.unbounded.satisfiedBy x✝ = True
- (Complexity.Arity.exactly k).satisfiedBy x✝ = (x✝ = k)
- (Complexity.Arity.upto k).satisfiedBy x✝ = (x✝ ≤ k)
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Equations
- One or more equations did not get rendered due to their size.
A basis of Boolean operations.
Each operation has an arity constraint and an evaluation function that computes the output bit from any valid number of input bits.
- Op : Type
The type of operations (e.g., AND, OR, NOT).
The arity constraint for each operation.
Evaluate an operation on
ninput bits, given thatnsatisfies the arity.
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A gate in a circuit over basis B with W wires available as inputs.
The gate's fan-in must satisfy the arity constraint of its operation, and each
input is wired to one of the W available wires.
- op : B.Op
The basis operation this gate computes.
- fanIn : ℕ
The number of inputs this gate reads.
- arityOk : (B.arity self.op).satisfiedBy self.fanIn
The wire each of the gate's
fanIninputs is connected to.Per-input negation flag. Negations are free under this library's size convention.
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A Boolean circuit over basis B with N inputs, M outputs, and G
internal gates.
All gates reference wires from Fin (N + G). The acyclic field ensures
that internal gate i only reads wires 0, …, N + i − 1, preventing cycles.
The internal gates; gate
idrives wireN + i.The output gates; output bit
jis the value of gateoutputs j.Acyclicity: internal gate
ionly reads wires0, …, N + i − 1.
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Value of wire w when the circuit is fed input.
The first N wires carry the primary inputs. Wire N + i carries the
output of internal gate i.
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- One or more equations did not get rendered due to their size.
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Depth of wire w in the circuit DAG.
Primary inputs have depth 0. Wire N + i (internal gate i) has depth
1 + max over input wires.
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- One or more equations did not get rendered due to their size.
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The library's circuit size: internal gates plus output gates.
Primary input vertices are not counted, and the negation flags on gate inputs have zero cost. Some texts instead count input vertices and explicit NOT gates; those conventions agree only up to additive/linear overhead, not on exact size bounds.
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If every circuit over B₁ can be simulated by a circuit over B₂
(possibly with a different number of internal gates), then completeness
of B₁ implies completeness of B₂.
This is the generic tool for proving new bases complete: show you can compile each gate of a known-complete basis into a subcircuit of the new basis.
The minimum circuit size over basis B computing a Boolean function f.
A single-output circuit Circuit B N 1 G computes f when
(fun x => (c.eval x) 0) = f. The size is G + 1 (internal gates +
output gate). Returns 0 if no circuit over B computes f.
Equations
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For a complete basis, circuit size complexity is always positive.
For a complete basis, sizeComplexity is realized by some circuit.