Parallel amplification circuits -- definitions #
This definitions layer emits several independent copies of a bounded-trace acceptance circuit. Every copy reads the same data wires and its own block of choice wires. The copies are serialized consecutively in the raw code, but their semantics are parallel: each copy receives only the shared primary inputs assigned to it and records one verdict wire.
After all copies have been emitted, a unary threshold fragment computes their strict majority. The construction is proof-free. Later modules establish the exact gate count, topological ordering, and evaluation semantics.
Regard an input layout as living in a larger prefix obtained by appending
extra wires. The absolute locations of every existing input are unchanged.
Equations
- layout.weaken extra = { choice := fun (i : Fin T) => Fin.castLE ⋯ (layout.choice i), data := fun (i : Fin n) => Fin.castLE ⋯ (layout.data i) }
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Weakening an input layout does not change a choice wire's absolute index.
Weakening an input layout does not change a data wire's absolute index.
Select one run's ordinary bounded-trace input layout.
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Selecting a run recovers that run's choice map.
Selecting a run retains the shared data map.
Canonical primary-input order for parallel amplification: all
runs * T choice bits in row-major run/time order, followed by the shared
n data bits.
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Canonical parallel choice wire (j, t) has row-major absolute index
t + T * j.
Canonical shared data starts immediately after every choice block.
Accumulated raw code while emitting independent acceptance copies.
verdictWires has the final arity from the beginning, avoiding dependent
casts while folding over run indices. Before run j is emitted its entry is a
dummy value; prefix invariants only interpret entries for completed runs.
- circuit : CircuitCode.RawCircuit
Acceptance fragments emitted so far.
Absolute output wire assigned to each completed run.
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First unused absolute wire after this build and its primary-input prefix.
Equations
- build.available primaryAvailable = primaryAvailable + List.length build.circuit
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Empty acceptance-copy build. Verdict entries are placeholders until their corresponding runs are emitted.
Equations
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Append one bounded-trace acceptance circuit and record its final wire as the selected run's verdict. The run layout is weakened across all gates emitted by earlier copies without changing any primary-input index.
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Append a listed sequence of acceptance copies to an existing build.
Equations
- Complexity.CircuitUnrolling.acceptanceCopiesBuildFrom tm layout build indices = List.foldl (Complexity.CircuitUnrolling.acceptanceCopiesBuildStep tm layout) build indices
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Build the first i canonical acceptance copies. List take saturates
when i exceeds the total number of runs.
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Complete build containing one independent acceptance circuit per run.
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Raw concatenation of every independent acceptance copy.
Equations
- Complexity.CircuitUnrolling.acceptanceCopiesFragment tm runs T n primaryAvailable layout = (Complexity.CircuitUnrolling.acceptanceCopiesBuild tm runs T n primaryAvailable layout).circuit
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Exact gate count recorded after emitting every acceptance copy.
Equations
- Complexity.CircuitUnrolling.acceptanceCopiesSize tm runs T n primaryAvailable layout = List.length (Complexity.CircuitUnrolling.acceptanceCopiesBuild tm runs T n primaryAvailable layout).circuit
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Absolute wire carrying each run's acceptance verdict.
Equations
- Complexity.CircuitUnrolling.acceptanceCopiesVerdictWires tm runs T n primaryAvailable layout = (Complexity.CircuitUnrolling.acceptanceCopiesBuild tm runs T n primaryAvailable layout).verdictWires
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Smallest integer count constituting a strict majority of runs.
Equations
- Complexity.CircuitUnrolling.strictMajorityThreshold runs = runs / 2 + 1
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Acceptance bits produced by independent bounded runs sharing one input.
Equations
- Complexity.CircuitUnrolling.parallelAcceptanceBits tm T x choices j = Complexity.CircuitUnrolling.boundedAcceptanceBit tm T x (choices j)
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Split a flat row-major seed into one bounded choice block per run.
Equations
- Complexity.CircuitUnrolling.parallelChoiceBlocks runs T seed j t = seed (finProdFinEquiv (j, t))
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Per-run acceptance bits under the canonical flattened-seed layout.
Equations
- Complexity.CircuitUnrolling.canonicalAcceptanceBits tm runs T x seed = Complexity.CircuitUnrolling.parallelAcceptanceBits tm T x (Complexity.CircuitUnrolling.parallelChoiceBlocks runs T seed)
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Independent bounded-trace acceptance copies followed by a strict-majority threshold over their recorded verdict wires.
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Absolute wire carrying the amplified circuit's strict-majority output.
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Canonical amplified raw circuit with all flattened choice blocks before the shared input data.
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