Hoare specification for the Tseitin reduction front end #
reductionFrontEndTM first initializes the fresh-variable register to one
more than the source bit length and then validates the source encoding. This
module composes the two framed contracts. The sequence boundary is an exact
no-op on the parked input, unary registers, and empty output accumulator.
The resulting postcondition records all state needed by the branch assembly:
- the input head is on the first trailing blank at
|z| + 1; freshRegcontains|z| + 1and every other work register is zero;- all work registers are preserved by validation; and
- output cell one contains
validEncoding z, with the output head at one and a blank tail.
Main results #
reductionFrontEndTM_hoareTime_internal-- structural bound5|z| + 13reductionFrontEndTM_linear_hoareTime_internal-- rounded bound13(|z| + 1)
Work-register family established by seedFreshTM: the fresh register
contains the source bit length plus one and the remaining five registers are
zero.
Equations
- One or more equations did not get rendered due to their size.
Instances For
Every initialized front-end register is parked.
Framed front-end execution. Starting from the ordinary initial tape
layout, initialize all six registers and validate z. Validation preserves
the initialized register family exactly and leaves its Boolean verdict at
output cell one.
Rounded linear-time form of the front-end contract, ready for later polynomial assembly.