unionTM simulation — proof internals #
This file contains the simulation lemmas needed to prove that unionTM tm₁ tm₂
correctly decides L₁ ∪ L₂ when tm₁ decides L₁ and tm₂ decides L₂.
Strategy #
The proof proceeds in three phases:
Phase 1 simulation: Show that the union machine faithfully simulates
tm₁fort₁steps, with tm₁'s output redirected to the fake output tape (work tapen₁).Transition phase: After Phase 1, the machine rewinds the fake output to check tm₁'s result. If tm₁ accepted (cell 1 =
Γ.one), writeΓ.oneto the real output and halt. Otherwise, rewind the input and start Phase 2.Phase 2 simulation: Simulate
tm₂using the real output tape.
Key definitions #
unionIdleTape— the steady-state of an idle tape (head at 1, cells fromTape.init [])unionPhase1Cfg— embedding of a tm₁ config into the union machine's config space
The steady-state tape for an idle tape during Phase 1.
After the first step (where δ_right_of_start forces a right move from
cell 0), idle tapes remain at head position 1 with blank cells.
Equations
- Complexity.TM.unionIdleTape = { head := 1, cells := (Complexity.Tape.init []).cells }
Instances For
Embed a tm₁ configuration into the union machine's config space.
Active tapes (input, work 0..n₁-1, fake output at n₁) come from c.
Idle tapes (work n₁+1..n₁+n₂ and real output) use unionIdleTape.
Equations
- One or more equations did not get rendered due to their size.
Instances For
Phase 1 simulation: if tm₁ reaches c₁ from initCfg x in t₁ ≥ 1
steps, the union machine reaches the embedded config unionPhase1Cfg c₁
from its own initCfg x in the same number of steps.
After Phase 1, if tm₁ accepted (output cell 1 = Γ.one), the union
machine rewinds the fake output, checks the result, writes Γ.one to
the real output, and halts.
After Phase 1, if tm₁ rejected, the union machine transitions to a
config ready for Phase 2: state is Sum.inr (Sum.inr tm₂.qstart),
input/output/active work tapes match tm₂.initCfg x.
Phase 2 compatibility: a union machine config agrees with a tm₂ config on the active components (state, input, Phase 2 work tapes, output).
Instances For
Phase 2 simulation: if tm₂ reaches c₂ from initCfg x in
t₂ steps, and the starting union config is compatible with initCfg x,
then the union machine reaches a config compatible with c₂ in t₂ steps.