Circuit fragments for affine Boolean forms #
One fragment computes a Boolean affine form over arbitrary existing wires. It uses one AND gate per linear coefficient and the shared linear-size parity compiler. Sequential row compilation plus a threshold fragment yields a linear-size circuit deciding whether the complete affine output is zero.
The fragment semantics is the usual Boolean-ring dot product plus its constant coefficient.
An affine-form fragment uses exactly four gates per linear coordinate and four additional gates.
The final gate emitted by affine-form compilation carries its value.
The fragment is topologically ordered when all source references name pre-existing wires.
The compiled affine form is a nonempty well-formed raw circuit fragment.
Evaluation appends the affine-form value while preserving every existing wire.
Sequential row compilation has exact additive size.
The full affine-zero fragment has its advertised linear gate count.
The final gate of full affine-zero compilation carries its decision.
The full affine-zero fragment is topologically ordered when all matrix and input references name pre-existing wires.
The full affine-zero builder produces a nonempty well-formed raw circuit.
Evaluation preserves the incoming prefix and decides whether every compiled affine form vanishes.
Direct raw evaluation returns the all-zero decision for the affine forms selected from the primary input wires.
Specializing the generic affine form to one row of the standard seed
matrix agrees with affineEval.
The all-zero value of the compiled matrix rows is exactly the affine zero-cell predicate.