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Complexitylib.Circuits.Encoding.Parity.Defs

Raw parity-circuit fragments -- definitions #

This module builds an appendable fan-in-two circuit for the XOR of selected existing wires. One false initializer and three gates per selected wire give a linear construction that retains sharing, unlike expansion into a Boolean formula tree.

def Complexity.CircuitCode.Parity.foldXor (count : ) :
(Fin countBool)Bool

XOR of a fixed-width Boolean vector, defined from its first coordinate toward its last coordinate.

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    Accumulator wire before processing the selected wire at step.

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      First wire emitted while folding one selected bit into the accumulator.

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        Second wire emitted while folding one selected bit into the accumulator.

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          The three gates computing accumulator XOR input with shared intermediates.

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            def Complexity.CircuitCode.Parity.steps (available step count : ) :
            (Fin count)RawCircuit

            Process successive selected wires, starting at the supplied fold step.

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              def Complexity.CircuitCode.Parity.outputWire (available inputCount : ) :

              Absolute wire carrying the final parity value.

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                def Complexity.CircuitCode.Parity.compileRaw (available : ) {inputCount : } (refs : Fin inputCount) :

                Compile the XOR of selected existing wires as an appendable raw fragment.

                The fragment first creates a false accumulator and then uses three shared gates per selected wire.

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