Finite correlation bounds for circuits #
Two partitions of the inputs of a circuit into rectangle classes:
- by the output alone, if the circuit ignores the inputs in
D: each output class is a rectangle for the cutD; - by the output and the values on the frontier of a layout of the compiled constraint network
at time
t: by the separator lemma each class is a rectangle for the cutXof the inputs read before timet, and there are at most2 · 2^wclasses for a layout of widthw.
With a bisection hypothesis on the cut ranks, the inputs read before some time number exactly
⌊n/2⌋, since reads grow one at a time.
Reads grow one at a time. If each vertex reads at most one input, some initial segment
of every layout reads exactly k inputs, for every k up to the number read.
Unread inputs. If a circuit does not read the inputs in D, its two output classes
are rectangles for the cut D.
Frontier classes. Along a layout of the compiled network, the inputs with a given
output and given values on the frontier at time t form a rectangle for the cut of the inputs
read before time t.
Small sets have large cut rank. If every set of ⌊n/2⌋ coordinates has cut rank at
least ⌊n/2⌋ - e, then every set D of at most ⌊n/2⌋ coordinates has cut rank at least
|D| - e.
Theorem (unread inputs, finite). Under the bisection hypothesis, a circuit that leaves
at least k ≤ ⌊n/2⌋ inputs unread has squared correlation at most 2^(1 + e - k).
Theorem (frontier, finite). Under the bisection hypothesis, if a circuit reads at least
⌊n/2⌋ inputs and its compiled network has a layout with every frontier of at most w edges,
its squared correlation is at most 2^(1 + w + e - ⌊n/2⌋).