Uhlig decoder circuits #
This module specifies the XOR decoder over one completed routing/resource state and implements it with shared linear-size Boolean folds. The final theorems identify the decoder's output with the semantic value selected by each request pair and give its exact gate cost.
Generic expression compatibility names #
Compatibility name for generic De Morgan expression input mapping.
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- Algebraic.MassProduction.UhligCircuit.reindexExpression inputMap expression = Algebraic.DeMorgan.Expression.mapInputs inputMap expression
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Compatibility name for the generic De Morgan XOR expression.
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- Algebraic.MassProduction.UhligCircuit.xorExpression left right = left.xor right
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Compatibility name for the generic finite XOR expression fold.
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- Algebraic.MassProduction.UhligCircuit.finXor count terms = Algebraic.DeMorgan.Expression.finXor count terms
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Number of original input wires in one batched Uhlig layer.
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- Algebraic.MassProduction.UhligCircuit.layerInputCount prefixWidth suffixWidth pairs = 2 * pairs * (prefixWidth + suffixWidth)
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Number of resource-result wires in one batched Uhlig layer.
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- Algebraic.MassProduction.UhligCircuit.layerResourceOutputCount prefixWidth pairs = (Algebraic.MassProduction.UhligCircuit.prefixLast prefixWidth + 2) * pairs
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Original inputs followed by every (resource, pair) result.
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Read the original-input prefix of a layer state.
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- Algebraic.MassProduction.UhligCircuit.originalInputFromState state input = state (Fin.castAdd (Algebraic.MassProduction.UhligCircuit.layerResourceOutputCount prefixWidth pairs) input)
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State wire carrying one resource result.
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Embed one local pair input into the original-input prefix of a layer state.
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Prefix equality test for one request inside a layer state.
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Resource-result input expression for the decoder.
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One fixed decoder term: either the selected resource-result wire or the free false constant.
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XOR decoder for fixed prefix values.
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Runtime decoder selected by the two actual request prefixes.
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Semantic decoder on a completed layer state.
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Decoder circuit #
Recover the pair and side represented by a row-major direct-product output.
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- Algebraic.MassProduction.UhligCircuit.decoderPairSide output = finProdFinEquiv.symm (Fin.cast ⋯ output)
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Decoder expression attached to one row-major output.
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Gate count of one compiled decoder output.
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- Algebraic.MassProduction.UhligCircuit.decoderGateCount prefixWidth suffixWidth pairs output = (Algebraic.MassProduction.UhligCircuit.decoderOutputExpression output).gateCount
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All requested outputs decoded in ordinary row-major order.
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Shared linear-size Boolean folds #
Arithmetic XOR of all input wires. Compiling the arithmetic addition gate preserves sharing, so this avoids the duplication inherent in a De Morgan formula for XOR.
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- Algebraic.MassProduction.UhligCircuit.xorInputExpression count = Algebraic.DeMorgan.ArithmeticExpression.finSum count fun (input : Fin count) => Algebraic.Arithmetic.Expression.input input
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Program-gate count of the shared XOR fold.
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De Morgan circuit obtained by compiling the shared arithmetic XOR fold.
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OR of all input wires.
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- Algebraic.MassProduction.UhligCircuit.orInputExpression count = Algebraic.DeMorgan.Expression.finOr count fun (input : Fin count) => Algebraic.DeMorgan.Expression.input input
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Program-gate count of the shared OR fold.
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De Morgan circuit implementing the shared OR fold.
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Produce all fixed-prefix resource terms before their shared XOR fold.
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Three-input postprocessor for one candidate prefix pair. The second source indicator is outermost so the row decoder has one-hot form.
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Program-gate count of one fully specified decoder candidate.
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Circuit for one hardwired pair of possible request prefixes.
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Program-gate count of one row of decoder candidates.
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OR all candidates for the second request prefix while retaining one fixed candidate for the first prefix.
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