Proofs for totally regular linear maps #
- Every block of a totally regular matrix has rank at least the smaller of its dimensions
(
min_card_le_blockRank): it contains a nonsingular square block of that size. - A circuit computing a totally regular map has distinct output wires (
outputs_injective): two outputs on one wire would give two equal rows, hence a singular2 × 2block. - All inputs and outputs lie in one component of the wire graph: the component of an output is closed, so it is crossed by no signal, and the rank-cut bound forces every input and every output into it.
- Along the ranking of
MultiOutput.exists_rank, the number of inputs and outputs in a prefix grows by at most two per wire, so some prefix ending at an input or output holdsNorN + 1of them. For that prefix the two blocks have ranks summing to at leastN - 1, and the prefix is charged to the component holding all inputs, which givesN - 1 ≤ (A + η) (s - N)⁺ + 3 log₂ (N + 3 s) + C(sub_one_le_of_totallyRegular). - For a rectangular
m × Ntotally regular matrix with2 ≤ N ≤ m, themoutput wires are still distinct (outputs_injective_rect), so peeling the last gate and at most one output wire seated on itm - Ntimes leaves a program withs - (m - N)gates computing anN × Ntotally regular row-submatrix (exists_square_of_totallyRegular_rect). This gives the rectangular finite boundN - 1 ≤ (A + η) (s - m)⁺ + 3 log₂ (N + 3 s) + C(sub_one_le_of_totallyRegular_rect) and the asymptotic lower boundm + (1 / A - ε) N < s(eventually_lt_size_of_orderingBound_rect). - Cauchy matrices are totally regular (
totallyRegular_cauchy): a kernel vectorvof a square Cauchy matrix makes the interpolant through(y j, v j / w j), withwthe barycentric weights, vanish at everyx i; it has degree below the number of nodes, so it is zero, and thenv = 0.
Blocks of totally regular matrices #
A circuit computing a totally regular square map carries distinct outputs on distinct wires.
Any injective selection of rows of a totally regular matrix is totally regular.
A circuit computing a totally regular map on N ≥ 2 inputs carries distinct outputs on
distinct wires.
A wire of p.gate line other than the last gate carries the same value in p.
Peeling m - N gates from a program computing a rectangular m × N totally regular map
leaves a program with s - (m - N) gates computing an N × N totally regular submatrix.
A discrete intermediate value step #
The finite bound #
The layout bound needs only distinct output wires and the rank inequality at each cut. No finiteness assumption on the coefficient field enters this graph argument.
The finite bound for totally regular maps. A fan-in-two program over any signature
whose wires out carry a totally regular linear map on N inputs has
N - 1 ≤ (A + η) (s - N)⁺ + 3 log₂ (N + 3 s) + C.
The finite bound for rectangular totally regular maps. A fan-in-two program over any
signature whose wires out carry an m × N totally regular linear map with N ≤ m has
N - 1 ≤ (A + η) (s - m)⁺ + 3 log₂ (N + 3 s) + C.
Asymptotics #
The asymptotic layout transfer is uniform over all fields satisfying the rank-cut bound.
The asymptotic bound for totally regular maps with a general ordering coefficient.
The asymptotic bound for rectangular totally regular maps with a general ordering coefficient.
Cauchy matrices #
Square Cauchy matrices are nonsingular.
Cauchy matrices are totally regular: with distinct nodes x i, distinct nodes y j
and x i ≠ y j, every square submatrix is again a nonsingular Cauchy matrix.
The explicit Cauchy family is totally regular over ZMod q for a prime q ≥ 2 N.