Sparse field sizes preserving the condenser output rate #
For a target rate 1 + 1/u, round (u+1)*T up to a field bit length
b = 2 * 3^s, and then choose the powering bit length r = b-T.
The rate inequality u*b ≤ (u+1)*r survives this sparse rounding.
For m = ceil(k/r), the coordinate count is at most k, and the output
length satisfies u*(m*b) ≤ (u+1)*k + u*b.
These finite inequalities are a parameter choice for the binomial modulus
family. They adapt the field-size and powering tradeoff in Cheraghchi's
2010 thesis, Corollary 2.23, to a sparse grid; this grid choice is our
deduction, not a statement attributed to that source:
https://arxiv.org/pdf/1107.4709.
The normalized degree loss is at most error whenever
D*k ≤ error*2^T. No asymptotic bound, field construction, or runtime
certificate is claimed here.
The selected field bit length covers the entire rate and error budget.
Sparse rounding costs at most a fixed factor in field bit length.
The powering and slack bit lengths add up to the field bit length.
Positive rate and slack parameters leave a positive powering bit length.
The exact integer inequality expressing the target output rate 1+1/u.
Ceiling division supplies enough coordinates to carry all k bits.
A positive bit capacity per coordinate requires at most k coordinates.
The output-rate bound specialized to the sparse field bit length.
The exact normalized loss bound specialized to the sparse field bit length.