Structural facts about De Morgan restriction #
This module connects the origin graph to the concrete partial evaluator. It contains no circuit-specific XOR reasoning: the results say when a fixed input turns an origin into a constant and how facts about an earlier source gate are preserved while later gates are processed.
Following a constant origin produces that same constant.
Following a signed occurrence of the selected input produces a constant.
Following a signed charged-gate origin preserves a known constant value.
Deletion of an earlier charged gate survives processing one later line.
A constant value of an earlier source wire remains constant after one line.
Processing a later line cannot turn an earlier nonconstant value constant.
A charged gate is deleted whenever one of its final residual arguments is constant.
An initial gate with a constant left origin is deleted by every restriction.
An initial gate with a constant right origin is deleted by every restriction.
Fixing an input deletes every charged gate that reads that input directly.
A charged gate whose arguments are literals of one input is always deleted.
A constant deleted source forces every charged successor to simplify.
A restriction that both deletes a chosen charged gate and makes its source value constant. The latter fact is what forces a charged successor to simplify.
- fixedValue : Bool
Value assigned to the selected input.
- outputValue : Bool
Constant value produced by the annihilated gate.
The gate is recorded among the deleted charged gates.
- value_eq : (restrictProgram selected self.fixedValue source).values (Wire.gate gate) = ResidualValue.constant self.outputValue
Its source wire is represented by the stated constant.
Instances For
Every charged gate directly reading an input admits an annihilating fix.